Short for phase-locked loop， an electronic circuit that controls an oscillator so that it maintains a constant phase angle （i.e.， lock） on the frequency of an input， or reference， signal. A PLL ensures that a communication signal is locked on a specific frequency and can also be used to generate， modulate and demodulate a signal and divide a frequency.
PLL is used often in wireless communications where the oscillator is usually at the receiver and the input signal is extracted from the signal received from the remote transmitter.
PLL是一種電路，可將振蕩器生成的輸出信號的頻率和和相位與基准信號或輸入信號同步，在同步（或稱為鎖定）的狀態下，振蕩器的輸出信號和基准信號之間的相位誤差為零，或保持不變，如果誤差變大，則控制機制將作用於振蕩器，是相位誤差再次減到最小值，實際上在這種反饋控制系統中，輸出信號的相位被鎖定成基准信號的相位，鎖相環的名稱就是由此而來。
