S3C2440之NAND FLASH移植到S3C2410的驅動分析

S3C2440A的NAND FLASH驅動移植到S3C2410還是有些不一樣的，最主要的這兩個IC的NAND FLASH的寄存器有些不一樣，請看下面的兩者之間不同：

1. //
2. // Copyright (c) Microsoft Corporation. All rights reserved.
3. //
4. //
5. // Use of this source code is subject to the terms of the Microsoft end-user
6. // license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
7. // If you did not accept the terms of the EULA, you are not authorized to use
8. // this source code. For a copy of the EULA, please see the LICENSE.RTF on your
9. // install media.
10. //
11. //------------------------------------------------------------------------------
12. //
13. // Header: s3c2410x_nand.h
14. //
15. // Defines the NAND controller CPU register layout and definitions.
16. //
17. #ifndef __S3C2410X_NAND_H
18. #define __S3C2410X_NAND_H
20. #if __cplusplus
21. extern "C"
22. {
23. #endif
26. //------------------------------------------------------------------------------
27. // Type: S3C2410X_NAND_REG
28. //
29. // NAND Flash controller register layout. This register bank is located
30. // by the constant CPU_BASE_REG_XX_NAND in the configuration file
31. // cpu_base_reg_cfg.h.
32. //
34. typedef struct
35. {
36. UINT32 NFCONF; // configuration reg
37. UINT8 NFCMD; // command set reg
38. UINT8 pad1[3]; // pad
39. UINT8 NFADDR; // address set reg
40. UINT8 pad2[3]; // pad
41. UINT8 NFDATA; // data reg
42. UINT8 pad3[3]; // pad
43. UINT32 NFSTAT; // operation status reg
44. UINT32 NFECC; // error correction code 0
46. } S3C2410X_NAND_REG, *PS3C2410X_NAND_REG;
49. #if __cplusplus
50. }
51. #endif
53. #endif

上面的代碼是S3C2410A的寄存器，我們在看看S3C2440A的寄存器地址說明：

1. //
2. // Copyright (c) Microsoft Corporation. All rights reserved.
3. //
4. //
5. // Use of this source code is subject to the terms of the Microsoft end-user
6. // license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
7. // If you did not accept the terms of the EULA, you are not authorized to use
8. // this source code. For a copy of the EULA, please see the LICENSE.RTF on your
9. // install media.
10. //
11. //------------------------------------------------------------------------------
12. //
13. // Header: s3c2440a_nand.h
14. //
15. // Defines the NAND controller CPU register layout and definitions.
16. //
17. #ifndef __S3C2440A_NAND_H
18. #define __S3C2440A_NAND_H
20. #if __cplusplus
21. extern "C"
22. {
23. #endif
26. //------------------------------------------------------------------------------
27. // Type: S3C2440A_NAND_REG
28. //
29. // NAND Flash controller register layout. This register bank is located
30. // by the constant CPU_BASE_REG_XX_NAND in the configuration file
31. // cpu_base_reg_cfg.h.
32. //
34. typedef struct
35. {
36. UINT32 NFCONF; // configuration reg
37. UINT32 NFCONT;
38. UINT8 NFCMD; // command set reg
39. UINT8 d0[3];
40. UINT8 NFADDR; // address set reg
41. UINT8 d1[3];
42. UINT8 NFDATA; // data reg
43. UINT8 d2[3];
44. UINT32 NFMECCD0;
45. UINT32 NFMECCD1;
46. UINT32 NFSECCD;
47. UINT32 NFSTAT; // operation status reg
48. UINT32 NFESTAT0;
49. UINT32 NFESTAT1;
50. UINT32 NFMECC0; // error correction code 0
51. UINT32 NFMECC1; // error correction code 1
52. UINT32 NFSECC;
53. UINT32 NFSBLK;
54. UINT32 NFEBLK; // error correction code 2
56. } S3C2440A_NAND_REG, *PS3C2440A_NAND_REG;
59. #if __cplusplus
60. }
61. #endif
63. #endif