UCOS_II的移植到S3C2440 ADS 1.2

一、新建工程
1.新建一個ARM Executable Image
2.創建uCOS_II文件夾，創建兩個子文件夾，分別為ARM、SOURCE
ARM存放和平台相關的文件（"OS_CPU.H" "Os_cpu_a.s" "Os_cpu_c.c" ）
SOURCE下存入和平台無關的文件（"ucos_ii.h" "os_cfg.h" "os_core.c" "os_flag.c" "os_mbox.c" "os_mem.c" "os_mutex.c" "os_q.c" "os_sem.c" "os_task.c" "os_time.c" "os_tmr.c" ）
3.創建一個S3C2440文件夾，創建兩個子文件夾，分別為INC、SRC
INC存放S3C2440相關頭文件（"2440addr.h" "2440lib.h" "2440slib.h" "config.h" "Def1.h" "lcd.h" "mmu.h" "Option.h" "Target.h" "Timer.h" ）
SRC存放S3C2440相關源文件（"Timer.c" "2440init.s" "2440lib.c" "2440slib.s" "Font_Libs.c" "iphone.c" "lcd.c" "mmu.c" "nand.c" "Target.c" ）
4.創建一個app文件夾（app_cfg.h、main.c、Printf.c、Printf.h）

二、工程設置Edit->DebugRel Settings下
1.Target->Target Settings,Post-linker:ARM fromELF
2.Target->Access Paths選中Always Search User Paths（ucos_ii部分文件采用#include <>包涵，不修改這裡找不到文件）
3.Language Settings下ARM Assembler、ARM C Compliler、ARM C++ Complier處理器設置成ARM920T
4.Language Settings下ARM C Compliler下Errors下去掉Implicit pointer c,ARM C Compliler下Warnings下去掉Unused declaration（-O1 -g+ -cpu ARM920T -Wx -Ec）
5.ARM Linker下,Output下RO Base設置成0x30000000,Options下Image entry point設置成0x30000000,Layout下Place at beginning of image下的Object/Symbol設置成2440init.o,Section設置成Init，Listings下選勾Image map、List file設置list.txt，勾上Sizes、Totals、Unused、Veneers

6.ARM fromELF下Output file name下填寫輸出的二進制

三、移植文件的修改

對OS_CPU.H的修改：

1. /*
2. *********************************************************************************************************
3. * ARM
4. *
5. * Method #1: NOT IMPLEMENTED
6. * Disable/Enable interrupts using simple instructions. After critical section, interrupts
7. * will be enabled even if they were disabled before entering the critical section.
8. *
9. * Method #2: NOT IMPLEMENTED
10. * Disable/Enable interrupts by preserving the state of interrupts. In other words, if
11. * interrupts were disabled before entering the critical section, they will be disabled when
12. * leaving the critical section.
13. * NOT IMPLEMENTED
14. *
15. * Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
16. * would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
17. * disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
18. * disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
19. * into the CPU's status register. This is the prefered method to disable interrupts.
20. *********************************************************************************************************
21. */
23. #define OS_CRITICAL_METHOD 3
25. #if OS_CRITICAL_METHOD == 3
26. #define OS_ENTER_CRITICAL() (cpu_sr = OSCPUSaveSR()) /* Disable interrupts */
27. #define OS_EXIT_CRITICAL() (OSCPURestoreSR(cpu_sr)) /* Restore interrupts */
28. #endif
30. /*
31. *********************************************************************************************************
32. * ARM Miscellaneous
33. *********************************************************************************************************
34. */
36. #define OS_STK_GROWTH 1 /* Stack grows from HIGH to LOW memory on ARM */
38. #define OS_TASK_SW() OSCtxSw()

1. /*
2. *********************************************************************************************************
3. * ARM
4. *
5. * Method #1: NOT IMPLEMENTED
6. * Disable/Enable interrupts using simple instructions. After critical section, interrupts
7. * will be enabled even if they were disabled before entering the critical section.
8. *
9. * Method #2: NOT IMPLEMENTED
10. * Disable/Enable interrupts by preserving the state of interrupts. In other words, if
11. * interrupts were disabled before entering the critical section, they will be disabled when
12. * leaving the critical section.
13. * NOT IMPLEMENTED
14. *
15. * Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
16. * would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
17. * disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
18. * disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
19. * into the CPU's status register. This is the prefered method to disable interrupts.
20. *********************************************************************************************************
21. */
23. #define OS_CRITICAL_METHOD 3
25. #if OS_CRITICAL_METHOD == 3
26. #define OS_ENTER_CRITICAL() (cpu_sr = OSCPUSaveSR()) /* Disable interrupts */
27. #define OS_EXIT_CRITICAL() (OSCPURestoreSR(cpu_sr)) /* Restore interrupts */
28. #endif
30. /*
31. *********************************************************************************************************
32. * ARM Miscellaneous
33. *********************************************************************************************************
34. */
36. #define OS_STK_GROWTH 1 /* Stack grows from HIGH to LOW memory on ARM */
38. #define OS_TASK_SW() OSCtxSw()